1. Field of the Invention
The present invention relates to an image display device, and more particularly, to signal transmission lines for an image display device and a method for wiring the same that can minimize a resistor capacitor (RC) delay deviation resulting from overlaps of the signal transmission lines to improve display quality of an image.
2. Discussion of the Related Art
Recently, light, thin flat panel displays have become the primary image display devices for monitors of personal computers, mobile terminals and various information devices. A liquid crystal display, a light emitting display, a plasma display panel, a field emission display, and the like have been proposed as such flat panel displays.
A typical flat panel display includes a display panel having a plurality of pixels arranged in matrix form for displaying an image, a plurality of driving circuits for driving the display panel, and a control circuit for controlling the respective driving circuits. Here, each driving circuit may include at least one of a gate driver and a data driver, and the control circuit may include a timing controller.
The control circuit or driving circuits configured as mentioned above receive various synchronous signals and control signals from an external system, such as a video card, to drive the display panel. In particular, the control circuit, such as the timing controller, generates a plurality of control signals for control of the respective driving circuits in response to the synchronous signals received from the external system, and the respective driving circuits drive the respective pixels of the display panel in response to the control signals generated by the control circuit.
However, recently, a part of the constituent elements of the aforementioned driving circuits, for example, the gate driver, etc. have been formed in a Gate In Panel (GIP) scheme in which they are formed integrally with the display panel, causing a problem such as distortion of the control signals supplied to the respective driving circuits.
In detail, in a conventional case where the respective driving circuits are formed separately from the display panel, output buffers are provided respectively in the control circuit and driving circuits to maintain output characteristics thereof. However, in the case of the GIP scheme, a separate output buffer cannot be provided in each driving circuit or has little effect even though provided, thereby causing the respective control signals to generate resistor capacitor (RC) delay deviations under the influence of resistors and capacitors formed on supply lines or transmission lines thereof. In particular, overlap areas between a plurality of supply lines supplied with the control signals from the control circuit and a plurality of transmission lines for transmission of the control signals from the respective supply lines to the driving circuits are different, thereby causing the RC delay deviations to increase, thus degrading display quality of an image.